Hardware-accelerated Video Fusion

This projects aim at producing a low-power demonstrator for real-time video fusion using a hybrid SoC device that combines a low-power Cortex A9 multi-core processor and a FPGA fabric. The methodology involves using a fusion algorithm developed at Bristol based on Complex dual-tree wavelet transforms.  These transforms work in forward and inverse mode together with configurable fusion rules to offer high quality fusion output.

The complex dual-tree wavelet transforms represents  around 70% of total complexity. The wavelet accelerator designed at Bristol removes this complexity and accelerates the whole application by a factor of x4.  It also has a significant positive impact in overall energy. There is a negligible increase in power due to the fact that the fabric works in parallel with the main processor. Notice that if the optimization criteria is not performance or energy but power then the processor and fabric could reduce its clock frequency and voltage and obtain a significant reduction in power for the same energy and performance levels.

This project has built a system extended with frame capturing capabilities using thermal and visible light cameras.  In this link you can see the system working in our labs : hardware accelerated video fusion

This project has been funded by the Technology Strategy Board under their energy-efficient computers program with Qioptiq Ltd as industrial collaborator.

This research will be presented and demonstrated at FPL 2015, London in September.

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